1. Field of the Technology
The present invention relates to metal oxide based memory devices and methods for manufacturing such devices.
2. Description of Related Art
Resistive random access memory, RRAM, is a type of nonvolatile memory that provides the benefits of small cell size, scalability, ultrafast operation, low-power operation, high endurance, good retention, large On/Off ratio, and CMOS compatibility. One type of RRAM includes metal oxide layers that can be caused to change resistance between two or more stable resistance ranges by application of electrical pulses at levels suitable for implementation in integrated circuits.
As integrated circuit manufacturing technology scales down, damascene process for forming top electrodes of RRAM cells becomes more suitable than line patterning. A RRAM cell can include an access device that has first and second terminals, a first plug that contacts the first terminal, and a second plug that contacts the second terminal. The access device can be a transistor or a diode. A metal oxide layer contacts a top surface of the first plug and acts as a memory element in a RRAM cell. An insulating layer is disposed over the first and second plugs, and has first and second openings corresponding to the first and second plugs. First and second top electrodes can be disposed in the first and second openings, and connected to a bit line and a source line, respectively.
In methods of manufacturing RRAM cells, for example, top surfaces of first and second plugs are oxidized to form a metal oxide layer before respective top electrodes are formed in the openings. The metal oxide layer at the top surface of the second plug is to be etched away, as the second plug is designed to electrically connect the second terminal of the access device to a source line. However, etching away the metal oxide layer at the top surface of the second plug in the second opening can cause damage to the second plug, leading to higher resistance in the second plug. Further, there can be contamination to side walls of the second opening in the insulating layer. For instance, if the second plug includes copper (Cu) and the metal oxide layer includes a copper oxide (CuOx), copper may be sputtered onto side walls of the second opening while the metal oxide layer is etched away in the second opening.
In addition, a photoresist mask is used to protect the metal oxide layer in the first opening while the metal oxide layer is etched away in the second opening. After etching, the photoresist mask is stripped and this stripping may damage the metal oxide layer in the first opening.
It is therefore desirable to provide a memory cell and method of manufacture that eliminates the possibility of damage to the plug connected to the source line caused by etching away the metal oxide layer, and the possibility of damage caused by photoresist stripping to the metal oxide layer that acts as a programmable resistance element, in order to provide a cost-effective method of manufacture.